Hi /diy/
I'm working to a simple electronic project with arduino.
I have designed a sample and hold module with adjustable frequency.
The adc is the arduino one, I use a resistor ladder dac and a ne555 as a trigger generator. Everighin run smooth.
Now I have the desire to take a step forward, or maybe backward, doing this only analog. ( I've just a bit of experience in electronics )
I'm studing to make a s&h like the one in the picture, I suppose I can reuse the ne555 design as a gate...
Just someone can give me some general hint?
Then, it's possible to quantize my imput signal? I mean, the adc/dac conversion five me a 0-+5V signal in steps of 0.02 V, It's possible to obtain something like this easelly in analog?
At last, I want achive this goal for a large range of frequencies from 0.1 to 100kHz, I'm too pretentious?
Ty /diy/
I love you
>>990611
for simplicity a flash adc will work but is pretty component heavy
if you want something interesting try a sigma-delta adc. the output is digital but its not BCD
>>990611
>quantizing a signal in analog
quantizing literally means assigning a discrete value to an analog signal
the very act of quantization means that you shifted into the digital domain
>>990611
You know that the ATMega328 ADC has a built-in S&H, right?
One of the simplest ways to perform AD conversion is the single slope conversion (ramp up voltage at known rate, see when the input voltage is exceeded). There are better versions of the same idea, like dual slope conversion. Google explains it better. You can use ATMega328's analog comparators or even normal digital pins + timer for a crude single slope conversion.
Slope converters are generally slow, though. Typically 100kHz ADCs use successive approximation, meaning an N bit DAC + control logic. Google SAR ADC.
100kHz at 8b is possible with relatively crude design, but what are you going to do with your 100kB/s data stream?
And like the other anon said, large part of ADC is digital.
>>990623
>>990629
>>990698
Thanks for your answers!
My project is just for an easy demonstration of the audio implication of sample rate ( nyquist frequency and aliasing ) and quantization ( Reconstruction filter implication etc. ).I'm using a free running mode for the arduino adc picking only the most significants 8 bit, the resistor ladder adc combined with port manipulation give me a really fast conversion.
My actual design works well. My question about analog is more theoretical than practical. I'm just wondering if it's possible to achive the very same result without a microcontroller.
I mean, my clock generator it's only a NE555, I can make my s&h with just an opamp and a transistor, but in this way the voltage output is not quantized as the result of a AD/DA convertion.
Sounds like you wanna build a ADC from the ground up? Sure it's possible but might be a bit unwieldy
>>990830
>I'm just wondering if it's possible to achive the very same result without a microcontroller.
You know, you more or less answered your own question when you wrote
>I'm using a free running mode for the arduino adc
In other words, the ADC is an independent functional block (see the atmega datasheet) and it can produce conversion results without processor's help. The fact that you use the processor part to set up clocks, references etc. does not change that. You can actually stop the processor core when the converter is doing its job to reduce the noise level.
You can buy ADCs as separate components as well, with various interfaces. This includes interfaces which don't really need a processor to work (see ADC0800 for an ancient example) and interfaces which are outright nasty for processors, like ICL7107's 7-segment outputs.
And again, the very fact that the ADC output is digital means that ADCs aren't purely analog components and need digital parts to be able to produce their digital output. How much and what kind of digital stuff is needed depends on the converter type.
Finally, "digital" is an abstraction. All electronics is analog in reality (no, Mr. Planck, stay away). You can build the digital parts of your ADC from discrete transistors if you want to.
>>990830
Because all these guys are retarded, let me post a thing for you
Go to file dropper dot com and use /lecture17-18
Will probably help.
I don't understand why the op-amp model requires 2^n-1 bits though, it should only require one op-amp per bit of precision, and the decoder should feed directly into a register (probably with it's own sample-and-hold to prevent op-amp interference)
>>990908
>Because all these guys are retarded
>one op-amp per bit of precision
try look in the fucking mirror m8
>>990908
> I don't understand why the op-amp model requires 2^n-1 bits though, it should only require one op-amp per bit of precision
You can do it with one comparator and one op-amp per bit.
Assuming a range of 0-1V, the first comparator checks whether the input is above or below 0.5V. The op-amp then subtracts 0 or 0.5V from the input, and doubles the result. Each subsequent stage does the same thing. The comparator outputs are the digital encoding of the input voltage.
The main reason this isn't used for real ADCs is that sequential ADCs (successive-approximation, etc) achieve the same result by using a single stage sequentially and aren't significantly slower (each comparison has a propagation delay so N comparisons require N delays whether you perform them sequentially or just chain N stages together).
A flash ADC (with 2^N comparators) performs all of the comparisons in parallel, so it's much faster at the expense of requiring far more comparators. Flash ADCs are used where speed is more important than precision (e.g. DSOs need GHz sample rates but 8 bits is typically sufficient).
>>990908
I can't find the lecture you're talking about, but it sounds like you're talking about a parallel A/D converter.
> I don't understand why the op-amp model requires 2^n-1 bits though it should only require one op-amp per bit of precision
Those are comparators not op-amps.
Imagine a three bit ADC where each increment is 0.5v:
001 = 0.5v
010 = 1.0v
011 = 1.5v
100 = 2.0v....
The least significant bit needs to be on when the voltage is from 0.5v to 1.0v, off from 1.0v to 1.5v, on from 1.5v to 2.0v and so on. You'd need a fairly elaborate set of analog circuitry before every comparator to implement this logic. All a comparator does is output 1 or 0 depending on which of its analog inputs is higher. It makes a lot more sense to use a row of comparators to output thermometer code: (0001 = 0.5v, 0011 = 1v, 0111 = 1.5v..) then use a priority encoder to convert that to binary.
>>991064
>The main reason this isn't used for real ADCs
Not exactly in that manner, but by adding sample & holds between all the stages you'll get a pipelined converter and it's a very common way to implement fast converters. I don't know what are the current practical limits for their performance, but 12b 200MSPS converter is rather mediocre by today's standards.
>is that sequential ADCs (successive-approximation, etc) achieve the same result by using a single stage sequentially and aren't significantly slower
Pipelined converters produce one conversion result per clock. The price is rather long latency.
>Flash ADCs are used where speed is more important than precision
Flash converters have largely went out of fashion. Your typical multi-GHz ADC uses several paralleled pipelined ADCs to do its job. You can get rather high resolution that way too. For example, TI has a 16b 1GSPS converter, which internally uses 4 converters in parallel. Afaik the fanciest, fastest scope ADCs are built in a similar manner nowadays.
>>990908
>calls others retards
>doesn't understand the most basic principles of quantization
consider suicide, mate
