Is RISC-V the future?
https://riscv.org/
IBM, Oracle, Google, HP, and my BAE support it.
>>54996091
they said the same about ARM before.
and risc is slow as shit compared to ARM
>>54996091
>RISC
>a future
Pick one.
>>54996491
>ARM
Over 75% of sold chips are ARM today.
>RISC
Over 98% of sold chips are risc today
>risc is slow
>an instruction set is slow
well memed
Here is a nice video about RISC-V: https://www.youtube.com/watch?v=mD-njD2QKN0
Note that RISC-V is unrelated to >>>/v/ which is where you should go back to.
>>54996491
ARM uses the RISC architecture you dumb fucking nigger
Stop acting like you know what you're talking about
>>54996091
>name dropping cool meme companies like it makes a shit of difference
those companies support a lot of irrelevant things that the mainstream will never care about
>>54996491
RISC or CISC doesn't mean whether it's slow or fast.
>>54996554
RISC isn't an instruction set either.
>>54996669
RISC isn't an architecture either.
>>54996669
eat shit padjeet, or better go shit in the street.
>>54997147
>isn't an instruction set
>Reduced Instruction Set Computer
>not an instruction set
>>54997498
It's not. It's a design philosophy.
>>54997510
Technicalities.
>>54997147
>RISC isn't an instruction set either.
No, but RISC-V is:
"RISC-V (pronounced "risk-five") is a new instruction set architecture"
Why is /g/ so obsessed with the RISC vs. CISC wars like it's still 1992?
There hasn't been a meaningful difference between the two schools in quite some time, modern "RISC" is generally reduced only in that you can't access a value in memory and operate on it with a single instruction like the more "complex" CISC designs, even gimped ARM chips like the Cortex M4 have massive instruction sets that rival the textbook CISC Z80 of old.
There isn't even really a performance advantage anymore since the old performance RISC philosophy of "make it simple, clock it fast" has been dead since the late '90s.
>>54997606
That's because ARM is risc only in name. RISC-V is actually risc.
>>54997621
Is there even any concrete information on implementations of RISC-V yet? It really interests me.
>>54997662
As I posted that I just remembered lowRISC, though really, FPGA implementations don't really excite me.
>>54997662
Watched the linked video. India is spending $80M on building RISC-V chips. Some devices with RISC-V chips have already shipped.
>>54997662
There are even prototype chips.
>>54997684
India wants to get big in the chip industry so that they can implement their OLPC project.
>>54996091
RISC architecture is gonna change everything.
RISC is good
>>54997685
>bent pin in the top left
>>54997751
>nitpicking the bent pin when the gold leads connecting the die to the pins are totally fucked beyond recognition
>>54997738
how did you get a time machine in 1989?
CISC architectures are internali RISC, so, yes i think its good
https://www.raptorengineering.com/TALOS/prerelease.php
ORDER TODAY
>>54998283
>desktop
Into the trash it goes.
>>54998283
This is a RISC-V thread.
>>54997523
Kill yourself, you don't know a single fucking thing about computers.
Do not argue what you don't understand please.
I don't know what the fuck i'm talking about - The thread
>>54998863
Then correct people if you know so much.
>>54997606
It's the fact that RISC allows for more transistors to be allocated to registers rather than the logic core.
The performance advantages are nullified though, mostly because now modern CISC (mostly x86/amd64) processors have insanely powerful pipelines, branch predictors, and schedulers that enable those processors to match similarly performing RISC processors with in general lower power. Similarly, MIPS and PA-RISC can't compare to ARM because ARM holdings and chip manufacturers spend a lot more developing aforementioned features, which will be a lot more impactful than the very obvious "cram all the transistors into registers" tricks RISC can pull.
And of course, /g/ knows nothing about processor design so they just recall shitposts and parrot them across each thread, so it's expected that people have a lot of misconceptions about RISC and CISC.
>>54996091
Only as coprocessors.
CISC is better then RISC.
>>54996091
yay! no more Intel backdoors! also their MIPS like assembly is sooo clean and pretty :) can't wait for usable hardware, maybe early 2017?
>>54998283
Can't wait to get mine
>>54999060
CISC is better then RISC.
> better
kill yourself
> then
kill yourself x2
David Patterson is one of the guys behind the RISC-V ISA, so it should be pretty awesome. When will mere mortals (non-FPGA nerds) be able to buy implementations?
>>54996491
ARM uses risc dumbass
>>54999129
>so it should be pretty awesome
Instruction sets don't matter much wrt how awesome or bad a CPU is. The microarchitecture itself is what counts.
It is fairly unlikely somebody will implement something remotely as efficient or powerful as current Intel big cores, with RISC-V. Or heck, even the admittedly more pedestrian AMD big cores/ CMT modules. High performance CPU is hard and "new nerd-approved ISA" is not a silver bullet to solve that.
>>54999134
arm doesn't "use RISC" you retard, RISC is an abstract concept
>>54999422
>muh pedantics
>>54999244
it's not all about performance or "nerd approval". it's primarily about breaking free from the monopoly.
>>54999449
So why not just endorse POWER8 or MIPS?
https://twitter.com/boom_cpu/status/739176217694240768
can't wait to see the SPECint numbers
>>54999442
if you don't even know what the fuck RISC is to the point that you would say something so stupid, you shouldn't be shitting on anyone but yourself
>>>/v/
>>54999510
I never said such a thing, I'm just making fun of you for being a pedantic shitstain.
>>54997523
No, it really isn't an instruction set.
>>54999472
i don't know how POWER8 or MIPS are licensed
i know that RISC-V is free and open
>>54999627
OpenPOWER's a thing, I don't know about MIPS.
RISC-V is BSD licensed - that's as free as it gets :)
>>54999725
>attribution required
fuck of
>>54999472
because RISC-V is osom!
http://riscv.org/wp-content/uploads/2016/04/RISC-V-Offers-Simple-Modular-ISA.pdf
>>54999739
google it you lazy nigger
>>54999564
being a pedant is calling out someone for saying "ARM is RISC" instead of "ARM is a RISC microprocessor"
calling someone out for demonstrating they have absolutely no idea what they're talking about while trying to act like it is not being pedantic
so yeah, go back to your GPU threads 'bro'
OP here. You can all go fuck yourselves for making this one of the most autistic thread's I've ever read on /g/.
>>54999472
POWER is a shit choice outside of workstations
MIPS is dead on the desktop
>>54999914
>hurrrr auuutism
fuck off to reddit if you expect contributors that actually know shit about anytbing
>>54999952
holy shit look at those digits. it's happening soon.
>>54999929
>MIPS is dead on the desktop
So? Let's bring it back. No need to reinvent the wheel yet again.
>>54997606
Make it simply pipelined. Don't try to be at everything. Cache reasonably well with good memory interconnect. Make it use little die area. Put shitloads of cores on your ASIC.
It's working well for graphics shaders being used for embarrassingly parallel applications like cryptography & deep learning. We could do even better with an encoding so well optimised.
Or maybe you want an open, trustworthy, auditable secure element.
Open your mind. Then open your ISA.
>>54999964
here it goes
>>54999999
>>55000000
RISC-V will rule the waves.
>>54999999
check'd
>>54999999
N I C E
I
C
E
>>54999999
Checked
>>54999999
shit get
>>54999999
what a waist...
checked
>>54999627
MIPS is open, iirc.
>>54999978
More effort than it's worth, even when MIPS had SGI behind it it was faltering by the early 2000s. Although you could probably better attribute that to the Itanic hype train.
>>54999999
Yes.
We need a free ISA other than the clusterfuck that sparc is (don't know about openpower tho).
>>54999015
Agreed
>>54999999
Our Lord says the truth
>>54997523
Then give me some RISC bytecode that every RISC processor can run.
>>54999999
when i compare, all the hussles & tweaking in the 90-ties, needed to get some kernel 1.3 / 2.o.35 GNU/Linux up & running, on some Pentium1/24 MB ram or on classicAmiga_12oo 68o40/PowerPC_G2 hybridSymetricMultiprocessing; nowDays allmost every localised desktop distros (Mint, simplyMepis, AntiX, ubuntu,...) which i put in multiBoot, during gnuFeministic & cyberFeministic advocacy & activism, to new folk, who look for help inSide & outSide of a hackLab, i can say: -GNU/Linux is easier & less time consuming to install (halfAnHour per distro, compared to a day to patch, protect (fireWall), driverSolve & userLand (apps) equip any winblou$) -GNU/Linux is easier to use -- all the techical details are hidden from common desktop user, & left to root/admin realm...to the point that some desktop distros have their terminal/shell dissabled.. :) (control panels & centers reigns... :) ) -GNU/Linux saves time in general -- my estimate is 80 % after full switch (support) -you are on the legal side -- no cracking -one can recycle way old hw -- Pent2 / 64-256 MB ram with AntiX (exception to above is maybe hw egsotics like Debian GNU/Linux on new dual or Quad c0re Power6 AmigaOne x1ooo or x5ooo/4o 2.4 GHz :) & other non x86 hw like ARM/rasperyPi or the like. ) ...recently, we had an interesting phenomenon with g33ks in hackLab: experienced Slackware, Debian, Gentoo, arch,... powerUsers figured that, staying on a bleedeng rollingRelease tweakingTheLast edge "as-per-se" has no point any more, & that leaving developers, betaTesters, maintainers & packagers job is better to outSource to the people that do that things the best, so they switching to versionin "newbie" distros... :) ...actualy now than ever, it is more a question of psichologycal, sociologycal...maybe culture acceptance; than technical excelence.
>>55000166This get_this() {
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>>55000096
>it was faltering by the early 2000s
Because they were using old shit.
>>55000100
>clusterfuck that sparc
Is it that bad?
>>55000096
You really think starting from scratch would be better than improving the decently performing MIPS64?
>>55000217
>beats AMD
AMDkeks btfo by freetards
I'm not really surprised IBM supports it. If they could get another ten years of vendor locked in mainframe solutions to replace their POWER architecture they would be all for it.
>>55000217
Well, given the small die size, it'll be cheaper than ARM to produce, so it should see good penetration, and from that adoption we could see more companies on board to improve it, and perhaps see it match contemporary x86 offerings.
>>55000201
They were indeed just rehashing the same R10K technology over and over again, but was there anything newer out at the time that was actually performant?
>>55000217
>16 year-old SPEC benchmark
>>55000216
It is because one has to be batshit crazy to try to support it and modify it to one's needs, unlike Risc-V
Heck, one guy in my uni even added a complex numbers module and instructions to a Risc-V processor he was doing, good luck trying that with x86 or Sparc.
>>55000217
It is free, you won't have to pay license or royalties fees, which means that anyone can jump into it and improve it while being cheaper than the other ISAs
You guys also have to remember that Risc-V already has gcc support - something that openrisc didn't -, and that's a huge step towards development and support for it
>>54996091
They are just piling on it hoping that they won't have to pay Evil Intel anymore and just roll their own chips.
>>54999015
Significant optimizations to x86 became only possible when Intel put a RISC core (stolen from DEC) behind the decoding frontend.
>>55001022
>stolen from DEC
You can't really say Intel stole anything when they actually own all Alpha IP
>>55001022
>Significant optimizations
The fuck does that even mean? The "stolen" RISC-like core didn't even give the Pentium Pro that much of a significant advantage over the "pure" CISC Pentium in most software, definitely not as much as its full speed on-chip cache, non-afterthought SMP support or Windows NT finally not being a useless piece of shit did.
>>55000854
>but was there anything newer out at the time that was actually performant?
MIPS wise or just in general? No, but that was really my point. SGI was just rehashing instead of creating a new architecture.
>>54999422
dam ur an ritard
>>55000230
per GHz.
What clock rates are these shipping at?
>>55001275
1-2+GHz
>>55001068
Digital sued Intel for stolen IP in 1997. Compaq gave away Alpha to Intel only in 2001.
>>54999929
that is not an argument, because RISC-V is nowhere and nonexistent in both
Are they making open component blocks for it as well? Things like memory controllers, buses and IO. That's the biggest thing with ARM, you can build an ARM SoC without designing many parts.
>>54999999
>embarrassingly parallel
fuck u mememan
>>54997527
You said ARM used the RISC architecture.
Even if you wanted to say ARM uses the RISC-V architecture then that would be wrong.
I know what the fuck it is you retard.
>>54996091
I want this to be
>>55007815
>You said ARM used the RISC architecture.
I never said that.
>>55008506
You might not, but the person I replied to originally did.
>ARM uses the RISC architecture you dumb fucking nigger
>>55008506
Oh fuck I switched you around now.
Anyway the original message was
>>RISC
>Over 98% of sold chips are risc today
>>risc is slow
>>an instruction set is slow
>well memed
So I said RISC wasn't an instruction set. and then I got the reply saying:
>No, but RISC-V is:
But of course I know RISC-V is an instruction set, but it was implied that 98% of the world's CPUs were using that instruction set.
>>54997498
Yeah that's like saying "functional programming language" is an _actual_ programming language. It's not, it's like an adjective.
No because its only good at 1-2 tasks and the rest it sucks at. That's literally what RISC means. CISC>RISC for desktops.
>>55008650
That wasn't me either. I think I just misread the post you were replying to, since it's clearly wrong.
>>55008687
I'm unable to even after reading this post.
