Whats the pros and cons of RISC?
>>55055141
It can't run complex programs, and it has a reduced instruction set.
It's good for specific computing and nothing else.
However it scales better then CISC on high yield calculations (ie: it's better at math when it has multiple processors).
>>55055141
The decoding logic of RISC designs is much simpler, so it requires less silicon to implement, which leads to better power savings. MIPS and ARM are RISC processors that dominate the low power market.
Intel proved that by throwing enough billions and engineers at a CISC processor can lead to some power savings, but not as good as a straight RISC.
RISCs can also be easily pipelined to increase CPI. Modern x86s are pipelined because they're only CISC up to the decoding frontend, the rest of x86 is a RISC core.
Since the instruction size of RISCs is fixed to simplify decoding, this leads to worse code density than CISCs. However, Hitachi proved that it's very well possible to design a RISC core (SuperH, now J-core) with code density close to x86.
>>55055159
>It can't run complex programs, and it has a reduced instruction set.
RICS vs CISC doesn't matter anymore, all common CPUs are now a hybrid approach. CISC divided its instructions into microops and RICS combined ops allowing complex instructions. All that matters is the microarchitecture
http://www.eetimes.com/author.asp?doc_id=1327016
>>55055159
to think this is a tech board
>>55055413
>code density
So less is worse?
>>55055852
Yes, lower code density means that less information is packed in the same amount of bits. This was a big deal back in the day when memory was way more expensive and scarce, hence why the VAX was an excellent architecture for its time. Nowadays it's only a big deal in the embedded space.
>>55055141
>gud for doing things within their specialized set of instructions
>bad for everything else
